Amir Hekmatpour

Vita Career Objective
Previous Projects Education
Patents & Copyrights Teaching
Publications Research Interests
Invited Talks & Seminars Awards

Vita
1975 Math & Science Diploma, Alavi High School, Mashhad
1976-1977 Bus Boy, Pump Room Booth #1 Restaurant, Chicago, Illinois
1977-1979 Taxi Driver, Checker Cab Company, Chicago, Illinois
1979 BSEE, University of Illinois, Chicago
1979-1981 Security Guard, Kane Security Systems Inc., Chicago, Illinois
1980 BSCS, University of Illinois, Chicago
1980-1981 Teaching Assistant, Dept. of Information Engineering, University of Illinois, Chicago
1981 MSEE, Information Engineering, University of Illinois, Chicago
1981-1983 Associate Engineer, VLSI Design, IBM, Rochester, Minnesota
Circuit Design, Circuit Analysis, PLA Design and Optimization, Circuit Layout
1983-1985 Senior Associate Engineer, VLSI Design Automation, IBM, Rochester, Minnesota
Technology Mapping (integrate and convert existing BiPolar designs to CMOS)
1985-1987 Senior Associate Engineer, VLSI Design Automation, IBM, Burlington, Vermont
Logic Synthesis System Development, Support and optimization rules development
1987-1991 Research Assistant, Dept. of Electrical and Computer Engineering, University of California, San Diego
1989 MSCE, Computer Engineering, University of California, San Diego
1991-1993 Staff Engineer, Knowledge-Based Systems Development, IBM, Burlington, Vermont
Intelligent Decision Support Systems for Advanced Semiconductor Manufacturing
1993 PhD, Computer Engineering, University of California, San Diego
1994-1995 Advisory Engineer, IBM Manufacturing Technology Center, Boca Raton Florida
Intelligent Multimedia Information Systems
1996 - 1998 Senior Lecturer, University of Texas, ECE Department , Austin, Texas USA.
Web-Based Intelligent Multimedia Information Systems
1996 - 1999 Advisory Engineer, IBM Somerset/PowerPC Design Center, Austin, Texas
Multi-Processor (MP) Functional Verification Tools and Methodology
Power PC MP Test Generation and Coverage Analysis
1996 - Present Consultant:   FarsiNet, FarsiEats, PersianWeb, Gorbeh, ZanAmu, RimaTech, Amir.com.
1999 - 2000 Advisory Engineer, IBM Microelectronics, Research Triangle Park, North Carolina
World Wide Design Center, System-On-a-Chip Modeling, Co-Simulation & Verification
2000 - 2002 President, Iranian Cultural Society of North Carolina (ICSNC)
Board of Directors (2001), President (2002), Elections Committee Chair (2003-05), Public Relations Committee Chair (2002-04), News Letter Committee (2003-04)
2000 - 2003 Senior Engineer, IBM Microelectronics, Research Triangle Park, North Carolina
SoC & ASIC Design and Verification - Functional Coverage Analysis Tools & Methods
2004 - Present Senior Engineer, IBM System and Technology Group, Research Triangle Park, North Carolina
ASIC & IP Development - Standards-based IP Design & Verification
3rd Party IP Port to IBM ASIC, BLIP: Blue IP Portal - Web-based 3PIP Request, Qualification, and Delivery



Career Objective
Research and Development of Intelligent Autonomous Systems for Design and Design Automation.

My career with IBM since 1981 has provided me with a diverse background that allows me to operate and contribute in positions requiring a broad and comprehensive hands-on technical perspective. I enjoy creating and maintaining highly enthusiastic and "CAN DO" attitude R&D teams and providing the technical and personal leadership required for fostering innovation, quality and dynamic teamwork.

My approach to R&D is practical and solution-centeric: Identify the critical component of the process, understand technologies associated with current solutions, find technolgies weak points (or missing features), develop an integrated and extensible system architecture encompassing novel features and applications - incorporating best-of-the-breed technologies, emerging techniques and novel solutions.

Long-term Career Objective
R&D in the field of Life, its Creator(s) and all possible Bi-directional sustainable interactions and relationships between the Creator(s) and the created life forms - independent of time and space but including the eternity.


Previous Projects
IBM, Microelectronics, Research Triangle Park, North Carolina 5/2004 - Present
Senior Engineer - IP Acquisition & Verification
Responsibilities: Research and development of methods and systems for Third Party IP (3PIP) qualification, certification and verification. Development of industry standards for 3PIP spec and data exchange and analysis. Development of an integrated Web-based 3PIP Portal (aka IBM Blue IP Portal) for collaborative IP specification, qualification, cerification and design data exchange.
IBM, Microelectronics, Research Triangle Park, North Carolina 1/2003 - 4/2004
Senior Engineer - SoC & ASIC Design and Verification
Responsibilities: Research and development of methods and systems for verification of the next generation of System-on-a-Chip designs including, Functional, interconnect, toggle, and BUS protocol verification. Research and development of Web-based SoC verification coverage and protocol compliance analysis methods and systems.
Results: FoCuS2: A web-based system for Coverage-Driven Functional Verification of Integrated Circuits. Including WebCover2: an enhanced database-driven Web Portal, CovSigMa: A Coverage Modeling and Analysis Engine, and Harvester: A Multi-Algorithm regression suite generation and optimization framework.
SoCVer: A web-based system for automatic block-level assertion generation for SoC interface and interconnect validation.
IBM, Microelectronics, Research Triangle Park, North Carolina 2/2000 - 12/2002
Senior Engineer - IBM PowerPC Embedded Processor Design Center
Responsibilities: Research, and development of a comprehensive integrated functional coverage analysis methodology and environment to support random and deterministic functional verification of embedded PowerPC processors in general and PPC440, PPC440FPU, PPC442, PPC446 and follow on remaps and derivitives.
Results: The resulting system called Focus includes several analysis and management modules such as; WebCover: Web-based Coverage Analysis and Reports, CAnE: Coverage Analysis Environment Management, Director: Verification Directive Generator, RegressionDB: Coverage-based Regression suite generation, Tabulator: Architectural Coverage Analysis, etc. Focus provides continuous (24/7/365) monitoring, analysis, and optimization of random functional verification of processor design, across a distributed server farm, in a heterogeneous design and verification environment supporting Verilog and VHDL mix-designs, cycle and event simulators, Verilog/VHDL/C++/PSL assertions across AIX and Linux servers. Focus's integrated FocusDB MySQL database provides on-demand coverage and verification intelligence and web-based design and data management via WebCover.
IBM, PowerPC Somerset Design Center, Austin, Texas 4/97 - 02/2000
Advisory Engineer - VLSI Design Automation Engineer
Responsibilities: Research, development and support of Somerset PowerPC Multi-Processor test generation tools and methodology for G4 & G5 PPC family. In particular, to provide project lead, development, methodology and user support for the IBM Genie (Genesys) test generator. As the project lead I have been responsible for coordinating my development at Somerset design center with IBM Haifa Research Lab (Generator) and IBM Rochester Lab (Simulator) for timely support of G4 & G5 MP verification plans. The development responsibilities included developing Genie infrastructure (including DB2 server and clients, Genie Build and Release environments), G4 & G5 architectural knowledge-bases, corresponding heuristic testing knowledge, test post-processing utilities, release regression test suites, user training materials and online user guides. The methodology support included working closely with and providing system requirements to RTX, QMAN and SIMULATOR developers to ensure seamless integration of Genie and its tests within Somerset simulation environment. In addition, played a key role in the Somerset unified test generator migration plan and the common reference model utilization across all generators. User support has included training verification engineers to properly utilize Genie consistent with their projects' MP verification plans.

www.macosrumors.com/ on Thursday, Nov 12, 1998

IBM, PowerPC Somerset Design Center, Austin, Texas 9/95 - 4/97
Advisory Engineer - Verification Engineer
Responsibilities: Participated in PowerPC 604 and 604+ verification, test generation and debug. 604 silicon verification and bug fix verification. 604+ MP test generation and verification. PowerPC 750 (G3) architectural verification. 604e MP coherency verification and BIU coverage assessment. 603e and 603ev PPC compliance verification. Functional coverage tools and methodology assessment. Development, support and maintenance of 604e verification website and all member pages. Tools utilized: RTPG, MPRTPG, MPTG, Genie, Genesys, AVS, TexSim, Mephisto, XVS, Qman, BusWatch,...

IBM, Manufacturing Technology Center, Boca Raton, Florida, 9/93 - 9/95
Advisory Engineer - EM/2 Project Architect/Lead
Responsibilities: Project management, system enhancement, application development, customer support and marketing of ExperMedia/2. Defined and implemented new features and capabilities for ExperMedia/2 (based on usability analysis, customer requests and feedbacks). Upgraded and maintained the EM/2 Media Lab. Provided support to EM/2 projects and customers at IBM manufacturing in Vermont, San Jose, and Austin. Evaluated stereographics and VR-based interfaces for process control in manufacturing and as new features for EM/2. Developed a prototype of an adaptive GUI for EM/2. Provided customer training via on-site seminars and hands-on courses on knowledge-based systems and intelligent multimedia information systems.

IBM, Knowledge Based Systems Development, Burlington, Vermont, 9/91 - 9/93
Staff Engineer - Development Engineer
Responsibilities: Research and development of Intelligent systems for IBM's manufacturing enterprise in general and semiconductor manufacturing in particular. Served as lead architect and developer of ExperMedia/2: a multimedia expert system shell for semiconductor manufacturing process control. ExperMedia/2 was developed in OS/2 using C, PM, DM, IPF, REXX, and Smalltalk. Designed a set of hypermedia GUI templates for rapid prototyping and consistent development. Developed knowledge engineering and expert system development and deployment guidelines for IBM semiconductor manufacturing. Developed and coordinated development of several large scale multimedia knowledge-based systems based on EM/2 for IBM manufacturing in Vermont and San Jose.

UCSD, Department of Electrical and Computer Engineering, San Diego, 9/87 - 9/91
Research Assistant - Ph.D. Candidate
Responsibilities: Research and development of an AI-based architecture and reasoning algorithm for automation and management of VLSI design process. An object-oriented architecture for hierarchical knowledge representation. Knowledge-based techniques for VLSI design. User modeling and cognitive load analysis for the resulting knowledge-based systems (A joint research with the cognitive science department). Prototyping of the resulting knowledge representation architecture, inferencing algorithm and GUI templates in NEXPERT OBJECT, C, and X11 on SUN workstation. In addition participated in logic design, capture, and simulation of a bit-serial adder for an ultra low power bit-serial DSP processor for Hughes Aircraft Co. of Carlsbad California. This design activity was carried out on Apollo workstation using Mentor Graphics and UCB VLSI CAD tools.

IBM, VLSI Design Automation, Burlington, Vermont, 9/85 - 9/87
Senior Associate Engineer, VLSI Design Automation Engineer
Responsibilities: Local development, deployment and customer support for Technology Mapping System (TMS) and Logic Synthesis (LTS, LSS). Participated and provided tool support for conversion of several existing IBM microprocessors and TCMs from Bipolar to advanced CMOS technologies. Provided corporate wide training on "Technology Mapping" and "Logic Transformation". Performed human factors analysis and made proposals for GUI and knowledge-based user interfaces for the above tools.

IBM, VLSI Circuit Technology, Rochester, Minnesota, 4/81 - 9/85
Associate Engineer, VLSI Design Engineer
Responsibilities: Design and analysis of fast NMOS buffers. Design and layout of a dense PLA library using 45 degree extended devices. Design and analysis of low power CMOS drivers. Metastability and latchup analysis of CMOS library cells. Participated in development and customer support of Bipolar logic cards conversion to CMOS (technology mapping), automatic transformation and optimization of existing VLSI designs to newer technologies (logic transformation & synthesis), generation of test parts for the new BTV CMOS technologies, and design and analysis of a cascade voltage switch library.

UIC, Department of Information Engineering, Chicago, 3/80 - 3/81
Responsibilities: Design, analysis, and layout of an NMOS control logic for a CCD-based robot vision system. UIC MSEE Thesis project.
Kane Securities, Chicago, 9/79 - 3/81
Responsibilities: Security guard
Checker Taxi Cab Company, Chicago, 6/77 - 9/79
Responsibilities: Taxi Cab Driver
Booth Number One Company, Pump Room Restaurant, Chicago, 3/76 - 6/77
Responsibilities: Food Service Assistant



Education



Patents - IBM 2002, IBM 2003



Publications
  • A. Hekmatpour, A. Salehi, J. Coulter, "An XML-based Collaborative Framework for ASIC eDesign," Special Issue of the Journal of Computational Methods in Science and Engineering (JCMSE), 2006, published by the IOS Press, The Netherlands.
  • A. Hekmatpour, A. Salehi, "Block-based Schema-driven Assertion Generation for Functional Verification," Proc. of 14th IEEE Asian Test Symposium, ATS 2005, December 2005, Kolkata India.
  • A. Hekmatpour, F. Keyser, H. Shah, M. Hale, "Fast Track Third Party IP Core Integration - An efficient Two Pass IP-Based ASIC Design and Verification Methodology," Proc. of GSPx 2005, October 2005, Santa Clara, California.
  • A. Hekmatpour, K. Goodnow, H. Shah, "Standards-Compliant IP-Based ASIC and SoC Design," Proc. of IEEE International SOC Conference, September 2005, Washington D.C.
  • A. Hekmatpour, C. Alley, B. Stempel, J. Coulter, A. Salehi, C. Palenchar, A. Shafie, "A Heterogeneous Coverage-Directed Assertion-Based Verification Platform," Proc. of IEEE Custom Integrated Circuits Conference (CICC), September 2005, San Jose California.
  • A. Hekmatpour, K. Goodnow, "Standards-compliant Silicon IP Design - Advantages, Problems, and Future Directions," Proc. of DesignCon East Conference, Sept. 2005, Boston.  (Winner of the Best Paper Award in Chip-Level Design Category at DesignCon East 2005)
  • A. Hekmatpour, A. Shafie, A. Salehi, "An Extensible Notation and Format for Formal Specification, Capture and Exchange of the Architectural and Microarchitectural Attributes of Test Programs and Simulation Environments," ip.com, Document ID = IPCOM00012xxxxx, August 2005.
  • A. Hekmatpour, A. Shafie, "Architectural and Microarchitectural Attribute Extraction and Analysis for Simulation-based Functional Verification of Integrated Circuit Designs," ip.com, Document ID = IPCOM000126677D, July 2005.
  • A. Hekmatpour, "An Integrated System and Architecture for Seamless Modeling of Functional Verification and Analysis of Simulation Results," ip.com, Document ID = IPCOM000124602D, April 2005.
  • A. Hekmatpour, J. Coulter, A. Salehi, "FoCuS: A Dynamic Regression Suite Generation Platform for Processor Functional Verification," Proc. of 20th International Conference on Computers and Their Applications, CATA05, New Orleans, March 16-18, 2005.
  • A. Hekmatpour, J. Coulter, A. Salehi, "An XML-based Collaborative Framework for ASIC eDesign," Proc. of Third International Conference on Computer Science, Software Engineering, Information Technology, e-Business, and Applications, CSITeA04, Dec. 27-29, 2004, Cairo Egypt.
  • A. Hekmatpour, A. Salehi, "A Database Mining Methodology for Efficient Coverage-Driven Functional Verification", Proc. of Global Signal Processing Expo and Conference, GSPX 2004.
  • A. Hekmatpour, B. Devins, D. Robert, M. Hale "An Integrated Methodology and Flow for SoC Design, Verification, and Application Development," Proc. of Global Signal Processing Expo and Conference, GSPx 2004.
  • A. Hekmatpour, S. Kakkar "Advanced Processor Architectures: The Verification Challenge - An overview of functional verification progress including Random TG, Coverage, CDTG, CDV, FV, ABV", TechForum presented at the DesignCon East Conference, Boston, April 5-7, 2004.
  • A. Hekmatpour, J. Coulter, "Coverage-Directed Management and Optimization of Random Functional Verification," Proc. of International Test Conference, Charlotte NC, Sept. 2003.
  • A. Hekmatpour, I. Dawood and P. Kalyanasundaram, "On Teaching and Collaborative Development of Web-based Multimedia Knowledge-Based Systems," WebNet 96, World Conference Of the WEB Society,San Francisco, October 16-19, 1996.
  • A. Hekmatpour and Susie Prestone, "Can/Should Eighth Grade Students Design Interactive Hypermedia Courseware? A report on an IBM Technology Dissemination Project," Proc. of the World Conference on Educational Multimedia and Hypermedia (ED-MEDIA 95), Graz, Austria, June 1995.
  • A. Hekmatpour, "An Adaptive Presentation Model for Educational Hypermedia Systems," Journal of Educational Multimedia and Hypermedia, Vol. 4, NO. 3,November 1995.
  • A. Hekmatpour, "A Multimedia Methodology and Architecture for Computer-Aided Training and Certification, International Journal of Computers and Their Applications, Vol. 1, No. 2, December 1994.
  • A. Hekmatpour, "ExperMedia/2: A Hypermedia Application Develeopment Shell," Video Program and Proc. of 2nd ACM International Conference on Multimedia, San Francisco, October 1994.
  • A. Hekmatpour, Eric Millham, Larry Grant," MUTANT: A Multimedia Shell for Development of Computer-Aided Training and Certification Applications," Proc. of the ISCA (International Society for Computers and Their Applications) International Conference on Computer Applications in Industry and Engineering, pp. 37-41, Honolulu, Hawaii, Dec. 15-17, 1993.
  • A. Hekmatpour, E. Millham, and L. Grant, "ExperMedia/2: An OS/2 Multimedia Expert System Shell for Domain Experts," Presented at the World Conference on Educational Multimedia and Hypermedia (ED-MEDIA 93), Association for the Advancement of Computing in Education (AACE), Orlando, Florida, June 1993.
  • A. Hekmatpour, G. Brown, and R. Magnuson, "OGODA: A Multimedia Knowledge Based System for Thermco Furnace Diagnostics and Operator Training," TR-19.1008, IBM Vermont, June 1993.
  • A. Hekmatpour, G. Brown, R. Brault, G. Bowen, L. Grant, and E. Millham, "FTDD973: A Multimedia Knowledge Based System and Methodology for Operator Training and Diagnostics,i" Proc. of Conference on Intelligent Computer -Aided Training and Virtual Environment Technology (ICAT/VET-93), NASA/Johnson Space Center, Houston, Texas, May 1993.
  • A. Hekmatpour and C. Elkan, "A Multimedia Expert System for Wafer Polisher Maintenance," Proc. of the Ninth IEEE Conference on Artificial Intelligence Applications (CAIA), Orlando, Florida, March 1993.
  • A. Hekmatpour and C. Elkan, " Categorization-Based Diagnostic Problem Solving in the VLSI Design Domain, " Proc. of the Ninth IEEE Conference on Artificial Intelligence Applications (CAIA), Orlando, Florida, March 1993. (Winner of the Best Paper Award)
  • A. Hekmatpour, "WESDA: A Multimedia-Based Expert System for WESTECH Wafer Polisher Diagnosis and Maintenance," Technical Report TR-19.0991, IBM, October 1992.
  • A. Hekmatpour and L. Grant, "Knowledge-Based Diagnostic Support Shell," Proc. of IBM Interdivisional Technical Liaison Conf. on Expert Systems, Yorktown Heights, New York, pp. 230-237, October 1992.
  • A. Hekmatpour and L. Grant, "Intelligent Multimedia Systems for Tool Diagnosis and Maintenance," Proc. of IBM Symposium of Productivity in Manufacturing, Advanced Semiconductor Technology Center (ASTC), Fishkill, New York, October 1992.
  • A. Hekmatpour and C. Elkan "A Multimedia Expert System for Wafer Polisher Maintenance," Technical Report #CS92-257, Dept. of Computer Science and Engineering, University of California, San Diego, August 1992.
  • A. Hekmatpour and C. Elkan "A Case-Based Expert System for Recovery from Errors in the VLSI Design Process," Technical Report #CS92-256, Dept. of Computer Science and Engineering, University of California, San Diego, August 1992.
  • A. Hekmatpour, A. Orailoglu, and P. Chau, "Hierarchical Modeling of the VLSI Design Process," IEEE EXPERT, Special Track on Object-Oriented Programming in AI, April 1991.
  • A. Hekmatpour, A. Vassigh, and D. Norman, "Conceptual Modeling for Expert System User Interface Development," Proc. of 7th International Association of Science and Technology for Development (IASTED) International Symposium on Expert Systems Theory and Applications, Long Beach, California, December 1990.
  • A. Hekmatpour and P. Chau, "KINDEN: Knowledge-Based INtelligent VLSI Design ENvironment," Proc. of AI Systems In Government (AISIG) conference, Washington D.C., May 1990.
  • A. Hekmatpour and P. Chau, "AI Techniques and Object-Oriented Technology for VLSI Design-Space Representation, Optimization, and Management," Applications of Artificial Intelligence VIII Conference, Proc. of SPIE (The International Society for Optical Engineering), Vol. 1293, Orlando, Florida, April 1990.
  • A. Hekmatpour, S. Powell, and P. Chau, "KINFIDA: An Object-Oriented Model-Based Digital Filter Design Assistant," Proc. of IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Albuquerque, New Mexico, April 1990.
  • A. Hekmatpour, A. Orailoglu, and P. Chau, "KINTESS: A Knowledge-Based Expert System CAD for ASIC Technology Selection," Proc. of GOvernment Microcircuit Applications Conference (GOMAC), Orlando, Florida, November 1989.
  • T. Hamada, A. Hekmatpour, R. Carden, T. Kammeyer, and P. Chau, "EDIF Activities at UCSD VLSI-DSP CAD Laboratory," Proc. of 5th EDIF User Group Workshop, San Jose, California, September 1989.
  • A. Hekmatpour, and B. Winter, "TMS: Technology Mapping System; Results and Future Plans," Proc. of IBM Circuit and Design Automation Conference, Austin, Texas, pp. 64-68, February 1985.
  • J. Gilkinson, S. Lewis, B. Winter, and A. Hekmatpour, "Automated Technology Mapping," IBM Journal of Research and Development, Vol. 28, No. 5, pp. 546-556, September 1984.



© Copyrights
  • A. Hekmatpour, "A Methodology and Architecture for Interactive Knowledge-Based Diagnostic Problem Solving in VLSI Manufacturing," TX 3-758-975, USA, Feb. 22 1994.
  • A. Hekmatpour, IBM, "ExperMedia, ExperMedia/2, EM, EM/2, and ExperMedia Logos", 1993.
  • A. Hekmatpour, "RimaTech, Rima Technologies and Rima", 1995.
  • A. Hekmatpour, "FarsiNet, FarsiWorld, ParsWorld, NetPal, CyberPal, CyberChurch, CyberCafe", 1996.



Teaching
  • A. Hekmatpour, "Turning your ideas to an Invention - IBM's Disclosure Process - Patent Factory," IBM Research Triangle Park, North Carolina, Summer 2004.
  • A. Hekmatpour, "HTML For Online Documentation," Introduction to HTML 3.0, Hypermedia, GUI, Web performance issues and practical guidlines to user friendly Online documentation using HTML and CGI Scripting, Somerset Design Center, Austin, Fall 96.
  • A. Hekmatpour, "MMKBS: Multimedia Knowledge-Based Systems," Theory and principles of developing intelligent multimedia information systems, UT Austin, ECE Graduate Course, Spring 1996.
  • A. Hekmatpour, " Online MMKBS for integrated production management," IBM HD Head Manufacturing, San Jose, Spring 1995.
  • A. Hekmatpour, "Hybrid Expert Systems: Theory, Architectures, and Tools," University of Ferdowsi, Mashhad, Iran, Fall 1994.
  • A. Hekmatpour, "ExperMedia/2: A Multimedia Expert System Shell," IBM Manufacturing Technology Center, Boca Raton, Florida, Spring 1994.
  • A. Hekmatpour, "Expert Systems: Theory, Inferencing, and Knowledge Representation Architectures," University of Ferdowsi, ECE Dept., Mashhad, Iran, Summer 1993.
  • A. Hekmatpour, "Interactive Knowledge-Based Systems for Manufacturing process management," IBM Vermont Manufacturing, Fall 1992.



Invited Talks
  • A. Hekmatpour, "Invention Process and IBM's Invention Factory," SoC Development and Methodology Group, April 2004, Research Triangle park, North Carolina.
  • A. Hekmatpour, "Information Highway: History and Future Potential of Internet," Association of Iranian Professionals of Austin Texas, Sept 1997.
  • A. Hekmatpour, "Condition Action Tree: A decision tree architecture for procedural knowledge capture and representation," UCSD AI Seminar, Sponsored by the UCSD CSE Department, May , 1995.

  • A. Hekmatpour, "Efficient Manufacturing Operation Support: Intelligent Multimedia Information Systems," UCSD Advanced Manufacturing Seminar, Sponsored by The UCSD Program in Advanced Manufacturing, May , 1995.

  • A. Hekmatpour, "BioComputing: Technology, Terminologies, and Trends" and "Intelligent Computer Integrated Manufacturing," Presented two half day seminars at University of Ferdowsi, dept. computer engineering. Sponsored by the United Nations TOKTEN development program, August and September 1994.

  • A. Hekmatpour, "Intelligent Multimedia User Interfaces," Presented at the tenth IEEE Conference on Artificial Intelligence Applications (CAIA) conference, Intelligent User Interface Panel, March 1994.

  • A. Hekmatpour, "Intelligent Multimedia Computer-Aided Operator Training and Certification" and "Distributed Multimedia Information Systems," Presented two half day seminars at University of Ferdowsi, dept. computer engineering. Sponsored by the United Nations TOKTEN development program, July & August 1993.

  • A. Hekmatpour, "From 'read this, watch me, and show me what you know' To 'Multimedia-Based Training and Knowledge-Based Certification' in Semiconductor Manufacturing," Presented at the World Conference on Educational Multimedia and Hypermedia (ED-MEDIA 93), Orlando, Florida, June 1993.



Research Interests
  • Distributed and Colaborative Design and Verification Frameworks
  • Intelligent and Adaptive Design and Verification Frameworks
  • Hierarchical Design Space Modeling and Analysis
  • VLSI design automation, Coverage-driven test generation, Coverage-driven functional verification, Functional coverage modeling and analysis
  • Intelligent Multimedia Information Systems
  • Intelligent Internet-based/Web-based Applications
    • Intelligent Internet Search Agents
    • Internet Knowledge Compilers
    • Automated Internet Scanning and Knowledge-base compiling
    • Internet-based Global Enterprise Management
    • Internet-based Manufacturing Control/Automation/Management
  • Artificial Intelligence:
    • Autonomous Intelligent Agents
    • Database Mining
    • Decision Support Systems
    • Knowledge Based Systems
      • Expert Systems
      • Knowledge Representation
      • Knowledge Engineering
    • Machine learning
  • Human-Computer Interaction
    • Graphical/Multimedia/Hypermedia User Interfaces
    • Intelligent User Interfaces
    • Adaptive User Interfaces
    • User Cognitive/Conceptual Modeling and System Usability analysis
  • CBT, CAT, CAL, ICAT, ICAL - Intelligent Computer Aided Learning
  • Training and Decision Support Technologies
  • Virtual reality, Artificial reality, Artificial life.



Awards
2006Fifth Plateau Invention Achievement Award Silicon Solutions, IBM Research Triangle Park, North Carolina.
2006Invention Achievement Award, 2006.
19th & 20th patent application, 14th patent issue.		 Silicon Solutions, IBM Research Triangle Park, North Carolina.
2005Invention Achievement Award, 2005.
18th patent application, 13th patent issue.		 Silicon Solutions, IBM Research Triangle Park, North Carolina.
2004Fourth Plateau Invention Achievement Award ASIC & IP Development, IBM Research Triangle Park, North Carolina.
2003Invention Achievement Award, November 2003.
12th patent issue.		 ASIC & IP Development, IBM Research Triangle Park, North Carolina.
2003Invention Achievement Award, June 2003.
11th patent issue.		 SoC Methodology Development, Research Triangle Park, North Carolina.
2003Invention Achievement Award, April 2003.
10th patent issue.		 SoC Methodology Development, Research Triangle Park, North Carolina.
2003Invention Achievement Award, Feb. 2003.
9th patent issue.		 SoC Methodology Development, Research Triangle Park, North Carolina.
2001IBM Microelectronics Division 2000 Top 5% Patent Award World Wide Design Center, IBM Research Triangle Park, North Carolina.
2000 Third Plateau Invention Achievement Award World Wide Design Center, IBM Research Triangle Park, North Carolina.
2000Invention Achievement Award IBM World Wide Design Center, Research Triangle Park, North Carolina.
1999Invention Achievement Award PowerPC Design Center, IBM Austin, Texas.
1998 Second Plateau Invention Achievement Award PowerPC Design Center, IBM Austin, Texas.
1998IBM Microelectronics Division 1998 Top 5% Patent Award PowerPC Design Center, IBM Austin, Texas.
1997 IBM Microelectronics General Manager's Teamwork Award PowerPC Design Center, IBM Austin, Texas.
1997 First Plateau Invention Achievement Award PowerPC Design Center, IBM Austin, Texas.
1996 Informal Award PowerPC Design Center, IBM Austin, Texas.
1995 Invention Achievement Award Multimedia Inf ormation Systems, IBM Austin, Texas.
1994 Patent Application Award Knowledge-Based Systems, IBM Burlington, Vermont.
1993Best Paper AwardIEEE Artificial Intelligence Applications Conference.
1990 Achievement Award VLSI Design Automation, IBM Burlington, Vermont.
1987IBM Resident Study Fellowship IBM Burlington, Vermont.
1984Achievement Award VLSI Circuit Technology, IBM Rochester, Minnesota.
1981 Graduate School Honor Roll Scholarship Department of Information Engineering, University of Illinois, Chicago.
1980 Honor Roll Scholarship Department of Information Engineering, University of Illinois, Chicago.


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